Capacitance-Voltage analysis at different temperatures in heavily irradiated silicon detectors

The main operational parameter of a silicon detector is the charge collected at the electrodes when a particle is impinging on the device. The collected charge should reach its maximum when the detector is fully depleted. Thus it is of major importance to determine the full depletion voltage of the detector before and after irradiation with fast hadron fluence (Φ ). The measurement of the full depletion voltage is usually performed by capacitance-voltage analysis (C-V). Standardization of the procedure within RD50 has fixed the test signal frequency of a C-V measurement to 10kHz [1]. Measurements of non-irradiated silicon detectors are usually done at room temperature RT, while after exposure to large fast hadron fluence detectors need to be operated cold to sufficiently decrease the leakage current I (to permit higher operating voltage and dcrease the noise):